Soutenance de thèse de Sassi BEN AZIZA : Study of a High Speed, High Resolution Analog-to-Digital conversion system adapted for new generations of CMOS image sensors

Thursday 3 May 2018, 10:30 → 12:30 Europe/Paris

Room 9 (LPSC)

General context: CMOS technologies represent nowadays more than 90% of image sensors market given their features namely the possibility of integrating entire intelligent systems on the same chip (SoC = System-On-Chip). Thereby, allowing the implementation of more and more complex algorithms in the new generations of image sensors. New technics have emerged like high dynamic range reconstruction which requires the acquisition of several images to build up one, thus multiplying the frame rate. These new constraints require a drastic increase of image rate for sensors of considerable size (Up to 30 Mpix and more). At the same time, the ADC resolution has to be increased to be able to extract more details (until 14 bits). With all these demanding specifications, analog-to-digital conversion capabilities have to be boosted as far as possible.